Techno platform and IP silicon qualification engineer M/F
STMicroelectronics
Crolles, France
il y a 5j

Job description

Inside TDP / TVE department, SDA team is in charge of detailed analysis of TPQV (Techno Platform Qualification Vehicle) silicon data in order to provide deliverables required for techno platform and digital-IP silicon maturity milestones (MAT20 & MAT30).

In SDA team you will be responsible for the silicon analysis of one or several sets of digital-IPs / testchips from definition of testchip content, through test specification, analysis of silicon data, silicon debug when required, consolidation of results, review with IP teams until the release of final deliverables for TP / IP maturity.

Profile

  • Good understanding of digital IP & testchip operation
  • Communication, team work, collaboration skills
  • Fluent English (all written and most is oral comm is in English)
  • Problem solving skills
  • Prior experience in one or more of the following fields will be a plus :

  • Digital-IP design (memories, stdcells, ...)
  • Testchips design (full custom or semi-custom)
  • Electrical Test
  • Process Integration, modeling
  • Project management, TPPM
  • Candidate criteria

    Education level required

    5 - Master degree

    Experience level required

    Languages

    English (2- Business fluent)

    03 / 02 / 2020

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